UT architecture seminar today was by Greg Grohoski from Sun – an updated version of his Hot Chips talk. I’m not a big fan of this approach to chip architecture: 8 processors, each with 8 threads, but they are working hard on a real problem. The problem is the usual one of high speed processors waiting around for memory. It was interesting to see how OS limitations continue to cripple processor design. Cort Dougan’s nice work on memory management showed that careful tuning of the operating system mapping code got software table walk to blow away hardware table walk. But Sun chip designers seem to have not had an option of improving Solaris code – or even with getting rid of horrible errors like the four page tables that might all have to be searched to resolve a page miss! The interrupt hardware had to emulate 20 years of junk and the nightmarish register windows are still there. Even worse, the chip designers are trying to fairly schedule threads – although I’m not sure whether that is over-reach by chip architects or limitations of the OS. So, to me it looks like a huge amount of smarts, effort, and invention, compensating for problems that could have been solved in the operating system. One interesting note was that their measurement apparently do not show that the doubling the shared tiny L2 cache would make much of a difference. My conjecture is that modern applications are not showing locality of reference – due to a long chain of decisions that look unsmart in retrospect.